Resources Contact Us Home
Method for forming damascene structure utilizing planarizing material coupled with compressive diffusion barrier material

Image Number 6 for United States Patent #7326651.

This invention relates to the manufacture of dual damascene interconnect structures in integrated circuit devices. Specifically, a method is disclosed for forming a single or dual damascene structure in a low-k dielectric thin film utilizing a planarizing material and a compressive diffusion barrier material. The barrier material preferably has a compressive stress of greater than 300 MPa. In a preferred dual damascene embodiment of this method, the vias are formed first in the dielectric material, then the planarizing material is deposited in the vias and on the dielectric material, and the barrier material is deposited on the planarizing material. The trenches are then formed lithographically in the imaging material, etched through the barrier material into the planarizing material, and the trench pattern is transferred to the dielectric material. During and following the course of these etch steps, the imaging, barrier and planarizing materials are removed. The resultant dual damascene structure may then be metallized. With this method, the problem of photoresist poisoning by the interlevel dielectric material is alleviated.

  Recently Added Patents
Motion blur reduction for LCD video/graphics processors
Managing distributed applications using structural diagrams
Permeable pressure sensitive adhesive
Steering lock driving circuit and steering lock device
Creating three dimensional graphics data
System and method for associating financial transaction data with user's project data
Recovering a database to any point-in-time in the past with guaranteed data consistency
  Randomly Featured Patents
Dynamic activation of receive diversity
Method for coating metal substrates with a radically polymerizable coating agent and coated substrates
Electric lamp having a metal foil with a convexly and concavely curved surface
Stacked dipole antenna for use in wireless communications systems
Method and device for correcting estimated speed of induction motor and its device
Gaming system, gaming device and method providing tiered progressive bonusing system
Integrated electronic structure
Apparatus for accumulation and storing light energy and releasing the same therefrom for utilization
Method and device for testing a brain lesion electrode
Magnetic disk apparatus