Resources Contact Us Home
Multi-layer semiconductor integrated circuits enabling stabilizing photolithography process parameters, the photomask being used, and the manufacturing method thereof

Image Number 5 for United States Patent #7241558.

Stabilization of photolithography process parameters, the photomask being used, and the manufacturing method thereof is provided where a formal pattern layout is combined with a dummy pattern. A photomask is manufactured by utilizing the combined pattern layout so that density changes between the pattern structure layers of the multi-layer semiconductor integrated circuits are minimized.

  Recently Added Patents
Optical power measurement method, optical line terminal and optical network unit
Automatic engine oil life determination with a factor for oil quality
Bioelectric battery for implantable device applications
Method for transmitting a signal from a transmitter to a receiver in a power line communication network, transmitter, receiver, power line communication modem and power line communication syst
Pose-variant face recognition using multiscale local descriptors
Device for transmitting data between a serial data bus and working modules such as actuator modules and/or I/O modules
Steplessly adjustable cymbal locating device
  Randomly Featured Patents
Terminal and method for distinguishing between email recipients using specific identifier
Method and apparatus for scaling I/O-cell placement during die-size optimization
Control voltage tracking circuits, methods for recording a control voltage for a clock synchronization circuit and methods for setting a voltage controlled delay
Full wave envelope detector using current mirrors
Image forming apparatus with adsorption means
Input/output terminal with display
Molten carbonate fuel cell and method of manufacturing retaining material for electrolyte body of molten carbonate fuel cell
Non-volatile multilevel memory cell programming
Portable wall board system and method for using same