Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Multi-layer semiconductor integrated circuits enabling stabilizing photolithography process parameters, the photomask being used, and the manufacturing method thereof










Image Number 3 for United States Patent #7241558.

Stabilization of photolithography process parameters, the photomask being used, and the manufacturing method thereof is provided where a formal pattern layout is combined with a dummy pattern. A photomask is manufactured by utilizing the combined pattern layout so that density changes between the pattern structure layers of the multi-layer semiconductor integrated circuits are minimized.








 
 
  Recently Added Patents
Method of using nutritional compounds dihydroquercetin (taxifolin) and arabinogalactan in combination with dihydroquercetin (taxifolin) to reduce and control cardiometabolic risk factors assoc
System and methods for obstacle mapping and navigation
Continuously variable transmission and control method thereof
Clock phase recovery apparatus
Control of protein activity using a conducting polymer
Method and system for electronic assistance in dispensing pharmaceuticals
Method of transmitting and receiving a paging message in a mobile communication system
  Randomly Featured Patents
Discharge gas mixture for a fluorescent gas-discharge plasma display panel
Environmental protection system
Derivatives of cyclohexane
Croissant slicer
Valve operating mechanism for internal combustion engines
Methods and systems for conducting a game
Graphical code generation wizard for automatically creating graphical programs
Centralized analysis and management of network packets
Gate-to-drain overlapped MOS transistor fabrication process and structure thereby
Wafer level chip scale package and manufacturing method for the same