Image Number 4 for United States Patent #7180593.
The present invention provides an overlay mark for aligning different layers on a semiconductor wafer. The overlay mark comprises a bar-in-bar mark and two bar sets on the semiconductor wafer. The bar-in-bar mark comprises an inner bar mark positioned in one of the pre-layer and an outer bar mark positioned in the other pre-layer. The two bar sets are perpendicular to each other, and each of two bar sets comprises two parallel bars. The bars can be connected and the lengths of the bars can be the same or different.