Resources Contact Us Home
Buried word line memory integrated circuit system

Image Number 3 for United States Patent #7141838.

An integrated circuit system includes providing a semiconductor substrate and forming buried word lines in the semiconductor substrate with the buried word lines including vertical charge-trapping dielectric layers. The system further includes forming bit lines further comprising forming in-substrate portions in the semiconductor substrate, and forming above-substrate portions over the semiconductor substrate.

  Recently Added Patents
Image decolorizing device
Process for preparing higher hydridosilanes
Duty cycle adjustment of remote illumination source to maintain illumination output
Method and system for providing intelligent call rejection and call rollover in a data network
Front cover of an electronic device
Digital signal processing apparatus, liquid crystal display apparatus, digital signal processing method and computer program
Method and system for security authentication of radio frequency identification
  Randomly Featured Patents
Fluid handling structure, lithographic apparatus and device manufacturing method
Apparatus for controlling underwater based equipment
Enhanced error handling for I/O load/store operations to a PCI device via bad parity or zero byte enables
Print control device and print control method
Automatic slide guard
Phase detector with minimized phase detection error
Method for inhibiting neoplastic cells and related conditions by exposure to substituted N- arylmethyl and heterocyclmethyl-1H-pyrazolo (3,4-B) quinolin-4-amines
Mobile VDSL signal detector
Ice-removing device
Regulating retroviral replication, infection, and pathogenesis