Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Printed circuit patterned embedded capacitance layer










Image Number 3 for United States Patent #7138068.

A method is disclosed for fabricating a patterned embedded capacitance layer. The method includes fabricating (1305, 1310) a ceramic oxide layer (510) overlying a conductive metal layer (515) overlying a printed circuit substrate (505), perforating (1320) the ceramic oxide layer within a region (705), and removing (1325) the ceramic oxide layer and the conductive metal layer in the region by chemical etching of the conductive metal layer. The ceramic oxide layer may be less than 1 micron thick.








 
 
  Recently Added Patents
Chromene compound
Horse stationary tab
Motor drive component verification system and method
Inverter, NAND gate, and NOR gate
Reception method and reception apparatus
Multifunction switch for vehicle having lighting module
Bioreactor device, and method and system for fabricating tissues in the bioreactor device
  Randomly Featured Patents
Bar code reader or imager using controlled deformation of flexible optics
Game board
Method of manufacturing multiple-piece graphite crucible
Method and system for content recording and indexing
Magnifying optical system for endoscope
Fire retardant door and exit device for same
Method and system for implementing intermediary services in a telecommunication system
Container transfer lift
Phenyl-piperazine derivatives as modulators of muscarinic receptors
Sample-injection device for process gas chromatography with capillary columns