Resources Contact Us Home
Method of delay calculation for variation in interconnect metal process

Image Number 3 for United States Patent #6880142.

A method of calculating delay for a process variation includes finding a value for each of exactly two independent variables that results in a maximum or minimum variation of estimated cell delay plus net delay, calculating a variation of resistance from the value found for each of the exactly two independent variables, calculating a variation of capacitance from the value found for each of the exactly two independent variables, adding the calculated variation of resistance to a net resistance to generate a modified net resistance for a selected net, adding the calculated variation of capacitance to a net capacitance to generate a modified net capacitance for the selected net, and calculating the cell delay plus net delay from the modified net resistance and the modified net capacitance.

  Recently Added Patents
Systems and methods for simultaneously configuring multiple independent backups
Frothable aqueous composition for use in a carpet backing composition
Accelerator for a read-channel design and simulation tool
Battery terminal with current sensor
Pyridyldiamido transition metal complexes, production and use thereof
Methods and devices for enforcing network access control utilizing secure packet tagging
Crystalline solvates of 6-(piperidin-4-yloxy)-2H-isoquinolin-1-one hydrochloride
  Randomly Featured Patents
Driving circuit for cold-cathode tube
Pressure-assisted blow gun
Stacked OLED display having improved efficiency
Diving Mask
System for controlling multiple user application programs by spoken input
Reinforced flexible plastic tubing and methods of manufacture
Multi-format bar code reader
Diagnosis and treatment of malignant neoplasms
Composite container assemblies
Combined television and video cassette recorder stand