Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Selective polysilicon stud growth










Image Number 6 for United States Patent #6861691.

A memory cell includes a bit line contact feature that is characterized by a contact hole bounded by insulating side walls including first and second pairs of opposing insulating side walls. The first pair of opposing insulating side walls comprises respective layers of insulating spacer material formed over a conductive line. The second pair of opposing insulating side walls comprises respective layers of insulating material formed between respective contact holes. The contact hole is filled to an uppermost extent of the insulating side walls with a conductively doped polysilicon plug defining a substantially convex upper plug surface profile. The contact hole may define either a bitline contact or a storage node contact.








 
 
  Recently Added Patents
Configurable caged ball insert for a downhole tool
Surface modification
Method and structure of forming backside through silicon via connections
Adjustable box extender
Information display device and program storing medium
Prioritizing application data for transmission in a wireless user device
Piperazinedione compounds
  Randomly Featured Patents
Semiconductor device
Combined telephone housing and handset therefor
Robust signal transmission in digital television broadcasting
Digital printing or copying machine and process for fixing a toner on a substrate
Spin bowl compatible polyamic acids/imides as wet developable polymer binders for anti-reflective coatings
Process for preparing oximes
Guanidinealkyl-1,1-bisphosphonic acid derivatives, process for their preparation and their use
Keyboard with mechanical encoding
Drill bit nozzle
Pressure limited differential pressure switch