Resources Contact Us Home
Selective polysilicon stud growth

Image Number 6 for United States Patent #6861691.

A memory cell includes a bit line contact feature that is characterized by a contact hole bounded by insulating side walls including first and second pairs of opposing insulating side walls. The first pair of opposing insulating side walls comprises respective layers of insulating spacer material formed over a conductive line. The second pair of opposing insulating side walls comprises respective layers of insulating material formed between respective contact holes. The contact hole is filled to an uppermost extent of the insulating side walls with a conductively doped polysilicon plug defining a substantially convex upper plug surface profile. The contact hole may define either a bitline contact or a storage node contact.

  Recently Added Patents
Medical capsule housing formed by thermal welding
Load balancing in shortest-path-bridging networks
Quantifying the risks of applications for mobile devices
Lighting apparatus
Method of manufacturing pipe with branch
Method for measuring and improving organization effectiveness
Bandpass filter and radio communication module and radio communication device using the same
  Randomly Featured Patents
Integrated electric generating and space conditioning system
Combined seal and actuator support
Connector apparatus
Method to reduce contact resistance by means of in-situ ICP
Apparatus and method for extruding shear thinning material
Cutter device for cutting sheet and printer having the same
Using activity-based rest disturbance as a metric of sleep apnea
Control and regulating means for an adjustable hydrostatic unit
Method of magnetically recording and reading data, magnetic recording medium, its production method and magnetic recording apparatus
Motor vehicle seat with a back rest