Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Method for reducing extrinsic base resistance and improving manufacturability in an NPN transistor










Image Number 6 for United States Patent #6830982.

According to one exemplary embodiment, an NPN bipolar transistor comprises a base layer situated over a collector, where the base layer comprises an intrinsic base region and an extrinsic base region. The NPN bipolar transistor may be, for example, an NPN silicon-germanium heterojunction bipolar transistor. The base layer can be, for example, silicon-germanium. According to this exemplary embodiment, the NPN bipolar transistor further comprises a cap layer situated over the base layer, where a portion of the cap layer is situated over the extrinsic base region, and where the portion of the cap layer situated over the extrinsic base region comprises an indium dopant. The cap layer may be, for example, polycrystalline silicon. According to this exemplary embodiment, the NPN bipolar transistor may further comprise an emitter situated over the intrinsic base region. The emitter may be, for example, polycrystalline silicon.








 
 
  Recently Added Patents
Bamboo scrimber and manufacturing method thereof
Flow cytometer method and apparatus
Prevention and treatment of osteoarthritis
Variants of a family 44 xyloglucanase
Method and apparatus of communication using soft decision
Wafer level package and fabrication method
Cabinet door with tread pattern
  Randomly Featured Patents
Reduced fat multipurpose spread
Defibrillator patient monitoring pod
Fluid flow control and mounting thereof
Brake
Trap circuit arrangement
Bubbling fluid bed boiler with recycle
Method for producing patterning alignment marks in oxide
Process and apparatus for producing fibrets from cellulose derivatives
Air conditioning control system
Apparatus for analyzing and sorting biological particles