Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Flash memory having improved core field isolation in select gate regions










Image Number 4 for United States Patent #6815292.

A flash memory array having improved core field isolation in select gate regions via shallow trench isolation and field isolation implant after liner oxidation is disclosed. The flash memory array includes a core area and a periphery area, wherein the core area further includes a select gate region. The method of fabricating the flash memory array begins by patterning a layer of nitride over a substrate in active device locations. After the nitride is patterned, a silicon trench etch is performed to form trenches. After forming the trenches, a layer of liner oxide is grown in the trenches. Then, a field implant is performed in both the core area and periphery area to provide field isolation regions for the flash memory array with. Thereafter, poly1 is patterned in the core area to form floating gate and select word-lines.








 
 
  Recently Added Patents
Method and system of providing navigation service with directory assistance
Contact lens
Coated tablets
Detecting skin tone
Correcting client device inputs to a virtual machine
Catalyst composition and its use thereof in aromatics alkylation
Optoelectrical vapor sensing
  Randomly Featured Patents
Method of manufacturing a semiconductor device
Static devices and methods to shrink tissues for incontinence
Method of fabricating a thin-film transistor matrix for an active matrix display panel
Methods of producing piezoelectric vibrating devices
Two channel looped communication system having rerouting and folded loop capabilities
Contents editing apparatus with frequency adjustment
Method of operating a vertical DMOS transistor with schottky diode body structure
Faucet
4-((phenoxyalkyl)thio)-phenoxyacetic acids and analogs
Purification of sulfur hexafluoride