Resources Contact Us Home
System and method for fault-tolerant clock synchronization using interactive convergence

Image Number 3 for United States Patent #6801951.

A method for synchronizing nodes in a network is described that utilizes an interactive convergence technique. The technique utilizes communications protocol IEEE 1394 to broadcast each node's clock value to the other nodes in the network. Each node applies a voting algorithm to the set of broadcasted clock values to determine a voted clock value and each node's clock is set to that voted clock value. When a node's clock value is close in value to another node, those nodes are considered to be synchronized. The set of clock values to be used to determine the voted clock value consists of those nodes that are synchronized. The technique is implemented on hardware separate from the node's hardware and can be implemented on a field programmable gate array.

  Recently Added Patents
Computer device with digitizer calibration system and method
Data processing system, data processing method, and image forming apparatus
Multi-port, gigabit SERDES transceiver capable of automatic fail switchover
Carbon dioxide capture system and methods of capturing carbon dioxide
High purity diphenyl sulfone, preparation and use thereof for the preparation of a poly(aryletherketone)
Switching power supply apparatus with overcurrent limiting and prolonged holding time
Power device and method of packaging same
  Randomly Featured Patents
Multi-phone programming application
Composition, polymerizable composition, resin, optical component, and method for producing the composition
Dual purpose projectile and weapon combination
Method for manufacturing lens using opaque or semi-opaque material
Anti-rotating guide for reciprocating members
Brushless motor with a stator core integral with a holder
User interface for an electronic trading system
Multi-function packing insert
Suspendible shelving
Method of manufacturing ceramic LED packages