Resources Contact Us Home
System and method for fault-tolerant clock synchronization using interactive convergence

Image Number 3 for United States Patent #6801951.

A method for synchronizing nodes in a network is described that utilizes an interactive convergence technique. The technique utilizes communications protocol IEEE 1394 to broadcast each node's clock value to the other nodes in the network. Each node applies a voting algorithm to the set of broadcasted clock values to determine a voted clock value and each node's clock is set to that voted clock value. When a node's clock value is close in value to another node, those nodes are considered to be synchronized. The set of clock values to be used to determine the voted clock value consists of those nodes that are synchronized. The technique is implemented on hardware separate from the node's hardware and can be implemented on a field programmable gate array.

  Recently Added Patents
Method and system for filtering noises in an image scanned by charged particles
Economic filtering system for delivery of permission based, targeted, incentivized advertising
Method and apparatus for networked modems
Charged particle beam apparatus
Assisting apparatus, method, and program for checking crosstalk noise between hierarchized modules in a semiconductor circuit
Method for producing lactamates by way of thin film evaporation
Operation controlling apparatus
  Randomly Featured Patents
Forklift truck
Flotation aids for oil-in-water emulsions
Integrated reading and writing of a hologram with a rotated reference beam polarization
Integrated circuit with temperature detector
Method and apparatus for achieving system acquisition and other signaling purposes using the preamble in an OFDM based communications system
Method and apparatus for enhancing an infrared signal protocol
Downhole tubular expansion tool and method
Terazosin capsules
Autoantibodies which enhance the rate of a chemical reaction
Digital video broadcast system