Resources Contact Us Home
System and method for computing and unordered Hadamard transform

Image Number 8 for United States Patent #6766342.

A system and method for parallel computation of the unordered Hadamard transform. The computing system includes a plurality of interconnected processors and corresponding local memories. An input signal x is received, partitioned into M.sub.1 sub-vectors x.sub.i of length M.sub.2, and distributed to the local memories. Each processor computer a Hadamard transform (order M.sub.2) on the sub-vectors in its local memory (in parallel), generating M.sub.1 result sub-vectors t.sub.i of length M.sub.2, which compose a vector t of length M.sub.1.times.M.sub.2. A stride permutation (stride M.sub.2) is performed on t generating vector u. Each processor computes a Hadamard transform (order M.sub.1) on the sub-vectors u.sub.j in its local memory (in parallel), generating M.sub.1 result sub-vectors v.sub.j of length M.sub.2, which compose a vector v of length M.sub.2.times.M.sub.1. A stride permutation is performed on v (stride M.sub.1) generating result vector w, which is the Hadamard transform of the input signal x.

  Recently Added Patents
Lid for a container
System and transceiver clocking to minimize required number of reference sources in multi-function cellular applications including GPS
Organic light emitting display device and method of manufacturing the same
Stabilization of dicarbonate diesters with protonic acids
Systems and methods for managing policies on a computer
Systems and methods for performing live chat functionality via a mobile device
  Randomly Featured Patents
Temperature resistant aromatic polyethers
Method, system and article of manufacture for a firmware image
Comminuting machine with comb-like further comminuting structure
Feedback-tolerant method and device producing weight-adjustment factors for pre-synaptic neurons in artificial neural networks
Ceramic coating for temperature measurement
Electrogasdynamic coating system
Computer keyboard decal
Image forming apparatus and method
Compaction and decompaction of non-coded information bearing signals
Semiconductor memory device performing redundancy repair based on operation test and semiconductor integrated circuit device having the same