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Ferroelectric memory device and method of operating memory cell including ferroelectric capacitor










Image Number 9 for United States Patent #6717837.

A ferroelectric memory device includes memory cells including ferroelectric capacitors formed in regions in which first signal electrodes intersect second signal electrodes. Information is written into a selected memory cell by applying a write voltage between one of the first signal electrodes and one of the second signal electrodes in the memory cell. Information is read from the selected memory cell by applying a read voltage between one of the first signal electrodes and one of the second signal electrodes in the memory cell. Provided that the write voltage is .+-.Vs and the read voltage is either +Vs or -Vs, .vertline.Vs.vertline. is less than the absolute value of a saturation voltage at which remanent polarization of the ferroelectric capacitors is saturated.








 
 
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