Image Number 10 for United States Patent #6687985.
A multilayer wiring board comprising a mother wiring board and a carrier wiring board, in which all of the composing layers have IVH structure. The mother wiring board (11) is formed in the manner that a plurality of resin-impregnated-fiber-sheets having mother wiring layers (13) and first inner-via-hole conductors (14) for connecting the wiring layers (13) each other are laminated. The mother wiring board (11) comprises a base board (11a) and container board (11b) having an opening for forming a cavity (15). The carrier wiring board (16) has lands (17) for mounting LSI bare chips, wirings (18), a plurality of carrier-board-wiring-layers (19) and second inner-via-hole conductors (20) for connecting the wiring layers (19) each other. The carrier wiring board (16) is set in the cavity (15) for electrically connecting the carrier wiring board (16) to the mother wiring board (11) by connecting carrier board electrodes (21) to mother board electrodes (22) through connectors (23) of solder balls, gold bumps or electrically conductive paste. The carrier wiring board (16) has higher wiring density at the portion where LSI bare chips are mounted, than the mother wiring board.