Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Method of reducing substrate coupling/noise for radio frequency CMOS (RFCMOS) components in semiconductor technology by backside trench and fill










Image Number 6 for United States Patent #6638844.

A method of reducing substrate coupling and noise for one or more RFCMOS components comprising the following steps. A substrate having a frontside and a backside is provided. One or more RFCMOS components are formed over the substrate. One or more isolation structures are formed within the substrate proximate the one or more RFCOMS components. The backside of the substrate is etched to form respective trenches within the substrate and over at least the one or more isolation structures. The respective trenches are filled with dielectric material whereby the substrate coupling and noise for the one or more RFCMOS components are reduced.








 
 
  Recently Added Patents
Controlling generation of debug exceptions
Anti-infective agents and uses thereof
Security patch update processor
High performance strained source-drain structure and method of fabricating the same
Femtocell one-to-many packet delivery
Method and system for cooling of integrated circuits
Probe for ultrasound diagnostic apparatus
  Randomly Featured Patents
Process for the nitration of aromatic compounds
Detergent mixing apparatus and method
Fuel homogenization system with dual compensating homogenization valves
Wheel and reel display for a gaming device
Dual motion blocking sled
Electronic system and method for self-calibration of instrument landing systems
High rate transfer wheel for orienting unscrambled containers
Mannich bases and processes for the preparation of mannich bases
Sub-lance installation for carrying out measurements and/or taking samples in a metallurgical furnace
Propagating information among web pages