Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Block interleaver and de-interleaver with buffer to reduce power consumption










Image Number 4 for United States Patent #6625763.

A block interleaver is provided using a relatively small register file and a larger random access memory (RAM). In one embodiment, the size of the RAM is larger than the size of the register file by at least one order of magnitude. As a result, the register file consumes significantly less power than the RAM for similar operations. The register file receives a stream of sequential data values and stores the data values in a column order. The data values are then read from the register file in a row order. The data values read from the register file in a row order are then written to the RAM in a row order. The data values are then read from the RAM in a row order, thereby creating an interleaved data stream. In a particular embodiment, the data values are written to the RAM in a staggered row order and read from the RAM in a sequential row order. All accesses to the RAM are performed using the full width of the RAM, such that no unnecessary power is used to access the RAM. The register file consumes significantly less power than the RAM, thereby providing an overall power savings for the interleaving process. In different embodiments, the register file can be a single-port device or a dual-port device. A similar block de-interleaver is provided in another embodiment.








 
 
  Recently Added Patents
Generator with a segmented stator
Dispenser
System and method to assess serviceability of device
Multi-layer, microporous polyolefin membrane, its production method, battery separator and battery
Unsupervised document clustering using latent semantic density analysis
Etching method, etching apparatus, and computer-readable recording medium
System for the secure management of digitally controlled locks, operating by means of crypto acoustic credentials
  Randomly Featured Patents
Method of equalizing radial load on plurality of pivoted bearing pads
Matric potential responder improvements
Pass/fail scan memory with AND, OR and trinary gates
Flat turbulator for a tube and method of making same
Control method and system for dual-fuel engine
Process for preparing peptides with anti-hypertensive properties
Analog to digital converter comprising an asynchronous sigma delta modulator and decimating digital filter
Wrapping apparatus having springable base
Underwater laser processing device including chamber with partitioning wall
Method of sealingly packing piece goods in a bag, as well as bag units adapted herefor