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Image Number 13 for United States Patent #6603175.
A semiconductor integrated circuit comprising: a first power line which supplies a first voltage potential; a second power line which supplies a second voltage potential that is lower than the first voltage potential; a voltage regulator circuit connected electrically to the first and second power lines; a third power line which supplies a constant voltage generated by a voltage regulator circuit, with reference to the first voltage potential; and an operating circuit connected electrically to the first and third power lines. At least one transistor configuring the voltage regulator circuit is a partially-depleted SOI field-effect transistor in which a body region and a source region are connected electrically. At least one transistor configuring the operating circuit is a partially-depleted SOI field-effect transistor in which a body region is in an electrically floating state.
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