Resources Contact Us Home
Versatile write buffer for a microprocessor and method using same

Image Number 8 for United States Patent #6594741.

A system and method are presented for a write buffer that combines capabilities and features implemented in separate, specialized buffers in prior art microprocessors. The write buffer receives data records from a CPU and subsequently transfers them to a memory bus. In addition to the data records themselves, each location in the buffer contains a complement of control bits, which determine the mode in which the associated record will be transferred to the memory bus. The use of these bits allows the buffer to perform memory transfers associated with a write-back data cache or an EJTAG test module, as well as more conventional transfers traditionally performed by a write buffer. The combination of these multiple capabilities in a single write buffer is believed to simplify the design of the bus interface unit in a microprocessor incorporating the principles disclosed herein.

  Recently Added Patents
Lithographic apparatus and device manufacturing method
Sensor controller, navigation device, and sensor control method
Selecting content for storage in a multi-device cache
Multi-dimensional tuple support in rule engines
Method for treating wounds for mammals, wound healer compound, and method of manufacturing thereof
Remedy for overactive bladder comprising acetic acid anilide derivative as the active ingredient
Policy based cryptographic application programming interface in secure memory
  Randomly Featured Patents
Workstation column
Keyboard apparatus
Cooling apparatus for an internal combustion engine
Ferroelectric liquid crystal materials and liquid crystal compositions containing the same
Extraction valve head for tanks
Composition and method for killing termites
Wallbracket for curtain rail
Electrophotographic copying apparatus having axially aligned developing elements
Manufacture of paper
Top cover for a material handling vehicle