Resources Contact Us Home
Versatile write buffer for a microprocessor and method using same

Image Number 8 for United States Patent #6594741.

A system and method are presented for a write buffer that combines capabilities and features implemented in separate, specialized buffers in prior art microprocessors. The write buffer receives data records from a CPU and subsequently transfers them to a memory bus. In addition to the data records themselves, each location in the buffer contains a complement of control bits, which determine the mode in which the associated record will be transferred to the memory bus. The use of these bits allows the buffer to perform memory transfers associated with a write-back data cache or an EJTAG test module, as well as more conventional transfers traditionally performed by a write buffer. The combination of these multiple capabilities in a single write buffer is believed to simplify the design of the bus interface unit in a microprocessor incorporating the principles disclosed herein.

  Recently Added Patents
Method and system to proxy phone directories
Multistream video communication with staggered access points
Assemblies for identifying a power injectable access port
Managing requests in a wireless system
Wall panel
Recombinant fusion proteins to growth hormone and serum albumin
Digital interactive phrasing system and method
  Randomly Featured Patents
Glass bulb for a cathode ray tube and a method for producing a cathode ray tube
Ink-jet printing apparatus, control method therefor, program, and storage medium
Methods and apparatus for estimating unknown quantities
Method of measuring track displacement on a magnetic tape
Exhaust gas purification apparatus, internal combustion engine comprising the same, and particulate filter restoring method
Grease injection control system
Distributor nozzle for a two-phase charge in fixed-bed reactors
Preparation of water-insoluble carboxymethyl cellulose absorbents
Catalyst for dehydrogenating primary alcohols to make carboxylic acid salts