Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Designing integrated circuits to reduce electromigration effects










Image Number 3 for United States Patent #6578178.

A method of designing an integrated circuit calculates the current density in each metal lead. The method can calculates a mean time to failure for at least one metal lead. The method can assume the metal leads are arranged in series only. The method can calculate the reliability of the integrated circuit. The method can arrange the set of metal leads by reliability. The method can divide the set of metal leads into at least two subsets, a subset requiring redesign and a subset meeting the reliability criteria. An embodiment includes an integrated circuit designed by the method taught. An embodiment includes a computer program product according to the method taught. An embodiment includes an integrated circuit including an integrated circuit designed according to the computer program product.








 
 
  Recently Added Patents
Blended block copolymer composition
Rotating-body electrification mechanism, image carrier unit, process cartridge, image forming apparatus, and method for electrifying image carrier unit
Gas cap removal tool
Kit and method for the capture of tumor cells
Antenna device
Substituted thiophene pentamers
Pausing a VoiceXML dialog of a multimodal application
  Randomly Featured Patents
Antenna system suitable for marine SSB radio
Belt tensioning system
Heat dissipation device
Light sensor and lighting device with adaptable color
Set of paving elements for production of paving and method of using the same
Method and compositions for controlling pain, depression and sedation
Method to control carbon black distribution in elastomer blends
Telecommunication and multimedia management method and apparatus
Fully self-aligned method for fabricating transistor and memory
Formation tester tool seal pad