Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Designing integrated circuits to reduce electromigration effects










Image Number 3 for United States Patent #6578178.

A method of designing an integrated circuit calculates the current density in each metal lead. The method can calculates a mean time to failure for at least one metal lead. The method can assume the metal leads are arranged in series only. The method can calculate the reliability of the integrated circuit. The method can arrange the set of metal leads by reliability. The method can divide the set of metal leads into at least two subsets, a subset requiring redesign and a subset meeting the reliability criteria. An embodiment includes an integrated circuit designed by the method taught. An embodiment includes a computer program product according to the method taught. An embodiment includes an integrated circuit including an integrated circuit designed according to the computer program product.








 
 
  Recently Added Patents
Intake parameter-calculating device for internal combustion engine and method of calculating intake parameter
Acrylic pressure-sensitive adhesive composition, acrylic pressure-sensitive adhesive layer, and acrylic pressure-sensitive adhesive tape
Desk
Automated user interface adjustment
Basket for a dishwasher
Pre-colored methodology of multiple patterning
Low cost mesh network capability
  Randomly Featured Patents
Multiple rotary hoe and support arms
Process for fibrillating polyester
Method of making dental prostheses
Apparatus for increasing attendance at parimutuel events
Paper web spreading shoe
Game-calculator having sliding mask
Foamed gel systems for fracturing subterranean formations, and methods for making and using same
Vertebral stabilization assembly and method
Locking device for containers on a vehicle
Brassiere