Resources Contact Us Home
Designing integrated circuits to reduce electromigration effects

Image Number 3 for United States Patent #6578178.

A method of designing an integrated circuit calculates the current density in each metal lead. The method can calculates a mean time to failure for at least one metal lead. The method can assume the metal leads are arranged in series only. The method can calculate the reliability of the integrated circuit. The method can arrange the set of metal leads by reliability. The method can divide the set of metal leads into at least two subsets, a subset requiring redesign and a subset meeting the reliability criteria. An embodiment includes an integrated circuit designed by the method taught. An embodiment includes a computer program product according to the method taught. An embodiment includes an integrated circuit including an integrated circuit designed according to the computer program product.

  Recently Added Patents
Variable speed traffic control system
Display screen or portion thereof with graphical user interface
Image processing system and method
Lighting elements
System and method for providing advertising content using a group training system
Instantaneous single click perpetual date mechanism
Pipe coupling
  Randomly Featured Patents
Ink drop printer with print engine controller
Fuel gas conditioning system
Sliding/swing-type portable apparatus having self-retaining function
Multi-channel infrared optical phase fraction meter
Method of purifying readily polymerizable vinyl monomers
Advanced vanadium alloys for magnetic fusion applications
Falling amusement ride
Tactile feedback device providing tactile sensations from host commands
Room pressure control apparatus having feedforward and feedback control and method