Resources Contact Us Home
Designing integrated circuits to reduce electromigration effects

Image Number 12 for United States Patent #6578178.

A method of designing an integrated circuit calculates the current density in each metal lead. The method can calculates a mean time to failure for at least one metal lead. The method can assume the metal leads are arranged in series only. The method can calculate the reliability of the integrated circuit. The method can arrange the set of metal leads by reliability. The method can divide the set of metal leads into at least two subsets, a subset requiring redesign and a subset meeting the reliability criteria. An embodiment includes an integrated circuit designed by the method taught. An embodiment includes a computer program product according to the method taught. An embodiment includes an integrated circuit including an integrated circuit designed according to the computer program product.

  Recently Added Patents
Method, apparatus and article for detection of transponder tagged objects, for example during surgery
Method, preprocessor, speech recognition system, and program product for extracting target speech by removing noise
Front exterior of an automotive tail lamp
Technology for managing traffic via dual homed connections in communication networks
Substituted thiophene pentamers
Identifying conceptually related terms in search query results
Knife grip
  Randomly Featured Patents
Method for managing memory blocks in flash memory
Medical device including unitary, continuous portion of varying durometer
Heat history control system, printer, and program
Thermal compensation spindle for ceramic ball bearings
Rooted plant assay system
Silicon-based optical modulator for analog applications
Peptides, and antidementia agents containing the same
Wafer transfer system with temperature control apparatus
Bidirectional lateral flow test strip and method
Molar tube appliance for a lip bumper or a face bow