Resources Contact Us Home
Restricting the damaging effects of software faults on test and configuration circuitry

Image Number 6 for United States Patent #6578166.

A system that restricts the damaging effects of software faults that interact with test and configuration circuitry. This test and configuration circuitry includes a scan chain in the form of a serial linkage between memory elements within a circuit, thereby allowing a test input to be serially shifted into the memory elements. The system operates by receiving a test disable signal at the circuit. In response to the test disable signal, the system moves the circuit into a test disable mode, which limits any damaging effects to the circuit caused by shifting the test input into the memory elements in the scan chain. Next, the system shifts the test input into the memory elements in the scan chain. T he system also determines whether the test input will cause damage to the circuit after the test input is completely shifted into the scan chain. If so, the system holds the circuit in the test disable mode so that the test input cannot damage the circuit. If not, the system moves the circuit out of test disable mode, and runs the circuit for at least one clock cycle in order to test the circuit.

  Recently Added Patents
Automatic configuration and provisioning of SSL server certificates
Dynamic display adjustment based on ambient conditions
Systems and methods for recognizing information in objects using a mobile device
Bluetooth authentication system and method
System, method and apparatus for media access control (MAC) address proxying
Piezoceramic multilayer actuator with high reliability
Method of improving the compatibility of an overbased detergent with other additives in a lubricating oil composition
  Randomly Featured Patents
Adhesive tape for an intravascular catheter
Random reliability engine for testing distributed environments
Method for producing alkenylthiophenols and their esters
DSP technique for photoacoustic spectroscopy (PAS) sample pulse response for depth profiling
Apparatus and method for upgrading codec
Order and accounting method and system for services provided via an interactive communication network
Sweetness inhibitor
Synchronous circuit with improved clock to data output access time
Attachment element
Shaped container