Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Restricting the damaging effects of software faults on test and configuration circuitry










Image Number 6 for United States Patent #6578166.

A system that restricts the damaging effects of software faults that interact with test and configuration circuitry. This test and configuration circuitry includes a scan chain in the form of a serial linkage between memory elements within a circuit, thereby allowing a test input to be serially shifted into the memory elements. The system operates by receiving a test disable signal at the circuit. In response to the test disable signal, the system moves the circuit into a test disable mode, which limits any damaging effects to the circuit caused by shifting the test input into the memory elements in the scan chain. Next, the system shifts the test input into the memory elements in the scan chain. T he system also determines whether the test input will cause damage to the circuit after the test input is completely shifted into the scan chain. If so, the system holds the circuit in the test disable mode so that the test input cannot damage the circuit. If not, the system moves the circuit out of test disable mode, and runs the circuit for at least one clock cycle in order to test the circuit.








 
 
  Recently Added Patents
Storage system, control method therefor, and program
Method and apparatus for content-aware resizing of data chunks for replication
Analog-to-digital converter with input voltage biasing DC level of resonant oscillator
Timing and cell specific system information handling for handover in evolved UTRA
Identification of biomarkers in biological samples and methods of using same
Managing wear leveling and garbage collection operations in a solid-state memory using linked lists
Lid for a container
  Randomly Featured Patents
Disposable blade cartridge utility knife
Tomography device and method of forming a tomographic image by means of such a device
Shoe sole
Multilayered printed circuit board type resistor isolated tray for stress testing integrated circuits and method of making same
Pixel array arrangement for a soft x-ray source
Modular high density LED array light sources
Porous aluminum oxide structures and processes for their production
Electrical apparatus having resistance to atmospheric effects and method of manufacture therefor
Method and apparatus for successively positioning sheets of material with precision for punching aligning holes in the sheets enabling the sheets to be used in the manufacture of composite cir
Wine glass container device