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Control circuit and semiconductor memory device










Image Number 18 for United States Patent #6577550.

A control circuit for increasing the speed of a device responding to a control request from an external device when the external control request is overlapped with an internal control request. The control circuit includes a first signal processing unit for receiving the first control signal and generating a first processed signal. The first signal processing unit includes a filter for filtering the first control signal. A second signal processing unit receives the first control signal and generates a second processed signal. An arbiter receives the second processed signal and the second control signal, determines which one of the received signals is to be given priority, and generates a determination signal based on the determination. A main signal generator generates the main signal from the determination signal or the first processed signal based on the determination signal.








 
 
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