Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Delay locked loop for use in semiconductor memory device










Image Number 3 for United States Patent #6434062.

It is provided a delay locked loop for obtaining a reduced jitter and a stable time delay adjustment to thereby perform a bi-directional time delay with a small area even at low frequency applications. The delay locked loop includes an input unit for receiving a clock signal and a non-clock signal and comparing received signals to produce an internal clock signal, a controller for receiving the internal clock to produce a control signal, a bi-directional oscillator, responsive to the control signal from the control means, for performing a ring oscillation in a first or second direction and fulfilling an addition and subtraction adjustment function for a time delay, a counter for receiving an output signal of the bi-directional oscillator and counting the number that the signal is passed therethrough, and an AND gate for performing a combination operation on the outputs of the bi-directional oscillating means and the counting means, to produce the result as a final internal clock signal.








 
 
  Recently Added Patents
High damage threshold frequency conversion system
Driving system of display panel having a circuit of a voltage generator and driving method thereof
Cantilever of scanning probe microscope and method for manufacturing the same, method for inspecting thermal assist type magnetic head device and its apparatus
Process for preparing red cocoa ingredients, red chocolate, and food products
Method and apparatus for detecting an intermittent path to a storage system
Method for conformal plasma immersed ion implantation assisted by atomic layer deposition
Transistor and display device
  Randomly Featured Patents
Stable polyester polyol composition
Semiconductor memory device which can be set one from multiple threshold value
Cell with PbCl.sub.2 cathode
Welding guns with mechanical interface
Laser radar projection with object feature detection and ranging
Method for joining thin plates stacked on one another
Semiconductor devices having improved low-resistance contacts to p-type CdTe, and method of preparation
Polarization imaging
Human Ck.beta.-10 polynucleotides
Error correcting code with chip kill capability and power saving enhancement