Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Semiconductor integrated circuit device and its manufacturing method










Image Number 5 for United States Patent #6429521.

On a semiconductor substrate, there are formed a first macro cell having wiring layers of three layers each formed of a metal wiring layer (for example, an aluminum wiring) and a second macro cell having wiring layers of three layers each formed of a metal wiring layer similar to the first macro cell. The first macro cell is formed to have a wiring structure of three wiring layers though the originally necessary number of metal wiring layers is two. The metal wiring layer of each layer on the first macro cell is formed of the same material as the metal wiring layer of the corresponding each layer on the second macro cell. Moreover, the metal wiring layer of each layer is formed to have the same film thickness. In order to connect the first and second macro cells to each other, a macro interconnection wiring is formed to be included in the third wiring layer (uppermost wiring layer).








 
 
  Recently Added Patents
Organic light emitting display device and method of manufacturing the same
Semiconductor device
Digital photographing apparatus
Intelligent sensor network
Methods for testing OData services
Traffic signal mapping and detection
Method of optimizing air mover performance characteristics to minimize temperature variations in a computing system enclosure
  Randomly Featured Patents
Digital/analogue conversion
Sound field producing apparatus
Gear pump or motor with serrated grooves on inner wall for break-in operation
Lamp unit
Surface treatment of plastics material
Apparatus for applying an improved adhesive to sheet insulation having drainage channels
Bag folding machine
Portable dispensing pump
Secure system for non-covert user authentication and identification
Digital VFO device