Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Multiboard run-in tester for PCI expansions










Image Number 7 for United States Patent #6414505.

A system for running in, in which multiple PCI bus connections are each bridged to multiple boards-under-test. The presence or absence of power in each of these bus connections is monitored, and the boards-under-test are correspondingly powered up (or not). Multiple test-bed subboards are preferably used, each with multiple sockets for receiving boards-under-test with high-insertion-force connectors, and the independent power control permits the boards-under-test on one subboard to be powered off and swapped while the boards-under-test on the other subboard are still being exercised. Preferable a single movable extractor mechanism is mounted on each subboard, and can be positioned (with respect to any one of the high-insertion-force connectors) for linear extraction of the board-under-test without any torque.








 
 
  Recently Added Patents
Enediyne compounds, conjugates thereof, and uses and methods therefor
Listing recommendation using generation of a user-specific query in a network-based commerce system
Image reading apparatus, image reading method and program
Multiple carrier compression scheme
Wafer-level chip scale package
Algorithm for color corrected analog dimming in multi-color LED system
Charged particle source with integrated electrostatic energy filter
  Randomly Featured Patents
Vibrator bracket
Golf club head
Insulation block fastener
Rectification of natural gas
Multilayer-multiconductor microstrips for digital integrated circuits
Multi-chip package (MCP) with a conductive bar and method for manufacturing the same
Combined automated parallel synthesis of polynucleotide variants
Roller-supported closure having a closure retainer
Folding baby buggy frame assembly
Inhaler