Resources Contact Us Home
Multiboard run-in tester for PCI expansions

Image Number 10 for United States Patent #6414505.

A system for running in, in which multiple PCI bus connections are each bridged to multiple boards-under-test. The presence or absence of power in each of these bus connections is monitored, and the boards-under-test are correspondingly powered up (or not). Multiple test-bed subboards are preferably used, each with multiple sockets for receiving boards-under-test with high-insertion-force connectors, and the independent power control permits the boards-under-test on one subboard to be powered off and swapped while the boards-under-test on the other subboard are still being exercised. Preferable a single movable extractor mechanism is mounted on each subboard, and can be positioned (with respect to any one of the high-insertion-force connectors) for linear extraction of the board-under-test without any torque.

  Recently Added Patents
Packaging article
Behavioral fingerprint based authentication
Reading apparatus and reading method
Magnetic memory and method of manufacturing the same
Vehicle grille
Device for transmitting data between a serial data bus and working modules such as actuator modules and/or I/O modules
Methods for selective reverse mask planarization and interconnect structures formed thereby
  Randomly Featured Patents
Beverage container lid
Narrow track thin film head for high track density recording
MRI tomography apparatus for generating a motion signal
Catalyst and process for synthesis of ketenes from carboxylic acids
Apparatus for a steering wheel assembly
Resinous salts, their preparation, and their use in coatings
Unified modular multi-directional flow chemical distribution block
Imidazoline derivative, possible tautomer thereof, and vulnerary including such derivative or tautomer
Metal ball attachment of heat dissipation devices