Resources Contact Us Home
Process for fabricating an EEPROM device having a pocket substrate region

Image Number 4 for United States Patent #6376308.

A process for fabricating an EEPROM device having pocket substrate regions includes forming a pattern composite layer overlying a principal surface of a semiconductor substrate. The pattern composite layer includes a dielectric layer and a resist layer overlying the dielectric layer. Processing is carried out to reduce the lateral dimension of the resist layer relative to the dielectric layer thereby exposing an upper surface of the dielectric layer. A doping process is carried out in which dopants penetrate the exposed upper surface of the dielectric layer and enter the semiconductor substrate immediately below the exposed upper surface of the dielectric layer. Upon conforming the pocket regions, an oxidation process is carried out to form bit-line oxide regions in the semiconductor substrate.

  Recently Added Patents
Flexible circuit routing
System and method for document orientation detection
Sensor chip, sensor cartridge, and analysis apparatus
Pipe coupling
Fire detector
High order continuous time filter
Video stabilization
  Randomly Featured Patents
Rotary injection molding machine
Benzamido-alkyl-hydroxamic acid derivatives
Grommet and grommet-mounting structure
Spindle motor with a sealing member
Cooking rack
Shoe with inflatable bladder and secure deflation valve
High-speed rotation system
Ultra-high-tenacity polyvinyl alcohol fiber and process for producing same
Process for preparing .DELTA..sup.1,4 -pregnadiene-3,20-diones
Fluid drop ejector and method