Resources Contact Us Home
Process for fabricating an EEPROM device having a pocket substrate region

Image Number 4 for United States Patent #6376308.

A process for fabricating an EEPROM device having pocket substrate regions includes forming a pattern composite layer overlying a principal surface of a semiconductor substrate. The pattern composite layer includes a dielectric layer and a resist layer overlying the dielectric layer. Processing is carried out to reduce the lateral dimension of the resist layer relative to the dielectric layer thereby exposing an upper surface of the dielectric layer. A doping process is carried out in which dopants penetrate the exposed upper surface of the dielectric layer and enter the semiconductor substrate immediately below the exposed upper surface of the dielectric layer. Upon conforming the pocket regions, an oxidation process is carried out to form bit-line oxide regions in the semiconductor substrate.

  Recently Added Patents
Network based JIT on a priori knowledge of a set of disparate clients
Image output method and device, and image display
Optical channel transport unit frames transmission having interleaved parity
Method for producing an adhesive fastening element made of plastic
Method and system for migrating object update messages through synchronous data propagation
Woven mesh substrate with semiconductor elements, and method and device for manufacturing the same
Para-xylylene based microfilm elution devices
  Randomly Featured Patents
Base station equipment and a method for steering an antenna beam
Air testing device
Translucent and radio-opaque glass ceramics
Laparoscopic tissue retrieval device and method
Kininogen agent promoting bone formation and inhibiting bone resorption
Self-cleaning coal separator grids with multiple cleaning combs
Dual selective feed mechanism for automatic weapons
Method and apparatus for sterilizing a heat sensitive fluid
Method for coating an article with a ladder siloxane polymer and coated article
Cup holder