Image Number 12 for United States Patent #6365925.
A semiconductor device that is easily operated with a single positive voltage supply and exhibits an excellent linearity of mutual conductance and source-gate capacitance with regard to a gate voltage is provided. The semiconductor device comprises a second barrier layer of AlGaAs, a channel layer of InGaAs and a first barrier layer of AlGaAs that are stacked in this order on a substrate of GaAs with a buffer layer of u-GaAs between the substrate and the second barrier layer. Carrier supply regions doped with n-type impurity are formed in part of the first and second barrier layers. A low resistivity region including a high concentration of p-type impurity (Zn) is formed in the first barrier layer. The low resistivity region is buried in a high resistivity region and brought to contact with a gate electrode. Upon an application of positive voltage to the gate electrode, a carrier deficient region disappears in the channel layer and no parasitic resistance component remains.