Resources Contact Us Home
Clock tree topology

Image Number 3 for United States Patent #6353352.

A clock tree topology distributes a clock signal from a single input terminal 400 to three terminals 421-423 with an equal phase delay. The topology includes four lines 401-404 connected together at a first end 450 with adjacent lines forming right angles. A second end of the line 404 forms the clock signal input terminal 400. A second end of the remaining lines 401-403 are connected to first ends of lines 411-413. Second ends of the lines 411-413 form the terminals 421-423. A right angle is formed between each of the lines 401-403 and the respective one of the lines 411-413 to which it connects.

  Recently Added Patents
Doherty amplifier circuit
Nanoparticles in a flash memory using chaperonin proteins
Architectural panel with bamboo rings light density embossed surface
Note tab
Systems and methods for providing a video playlist
Transducer displacement protection
  Randomly Featured Patents
Manual respirator apparatus for use with automatic respirators
Liquid gravity feed ant elimination device
Pan protector
Drill rig elevating floor structure
Electrophoresis apparatus using capillary array and sample plate assembly used therefor
Method and apparatus for facilitating a fast restart after speculative execution
Device for ammonia fume reduction
Semiconductor integrated circuit device and method of producing the same
Tunable resonator plug
Tape dispenser