Resources Contact Us Home
Clock tree topology

Image Number 3 for United States Patent #6353352.

A clock tree topology distributes a clock signal from a single input terminal 400 to three terminals 421-423 with an equal phase delay. The topology includes four lines 401-404 connected together at a first end 450 with adjacent lines forming right angles. A second end of the line 404 forms the clock signal input terminal 400. A second end of the remaining lines 401-403 are connected to first ends of lines 411-413. Second ends of the lines 411-413 form the terminals 421-423. A right angle is formed between each of the lines 401-403 and the respective one of the lines 411-413 to which it connects.

  Recently Added Patents
Nuclear fission reactor, a vented nuclear fission fuel module, methods therefor and a vented nuclear fission fuel module system
High voltage circuit for electrical stimulation
Semiconductor power amplifier
Spread spectrum communication system and transmission power control method therefor
Permutational memory cells
Synchronization of sound generated in binaural hearing system
Sacrificial spacer approach for differential source/drain implantation spacers in transistors comprising a high-k metal gate electrode structure
  Randomly Featured Patents
Rotary aircraft download alleviation apparatus and methods
Agricultural products from Pseudomonas cepacia strains and methods of preparation
Female Luer fitting with spirally spaced interior locking protuberances
Monitor display
Actuator and zone valve
Image processing apparatus and image attribute altering method
Monitoring control for monitoring at least two domains of multi-domain processors
Mobile terminal and method for notifying charging state when charged by solar cell
Organic-inorganic nano composites and preparation method thereof
Protective jacket for a disk-shaped recording medium