Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Clock tree topology










Image Number 3 for United States Patent #6353352.

A clock tree topology distributes a clock signal from a single input terminal 400 to three terminals 421-423 with an equal phase delay. The topology includes four lines 401-404 connected together at a first end 450 with adjacent lines forming right angles. A second end of the line 404 forms the clock signal input terminal 400. A second end of the remaining lines 401-403 are connected to first ends of lines 411-413. Second ends of the lines 411-413 form the terminals 421-423. A right angle is formed between each of the lines 401-403 and the respective one of the lines 411-413 to which it connects.








 
 
  Recently Added Patents
Post-processing including median filtering of noise suppression gains
Antenna support device
System for determining potential lot consolidation during manufacturing
Surface acoustic wave resonator for down-hole applications
Method for the synthesis of an array of metal nanowire capable of supporting localized plasmon resonances and photonic device comprising said array
Note tab
Method for evaluating performance characteristics of dental curing lights
  Randomly Featured Patents
Vehicle
Three-dimensional manufacturing and assembly plant
Coatings based on polyesters from perfluoropolyethers
Moving linear piezoelectric motor for vehicle applications
Coated titanium dioxide pigment and a process for the production of the same
Apparatus for detecting target molecules and related methods
Preparation of branched polyethylene terephthalate
Method of online detecting MP3 music transmissions and an architecture thereof
Phase detector and phase-locked loop apparatus
Apparatus and method for multi-spot sampled tracking in an optical data storage system