Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Patching of a read only memory










Image Number 3 for United States Patent #6260157.

A processing device includes a ROM having program instructions and at leas one jump instruction stored therein, a patch program for patching the program instructions in the ROM, a RAM capable of storing the patch program and a patch vector table that indicates the location of the patch program. A processor executes the program instructions in the program ROM and uses the patch vector table to execute the patch program when one of the jump instructions is reached. The patch program may be stored in the RAM and the patch vector table may point to the address in the RAM at which the patch program is stored so that the processor jumps directly to the RAM to execute the patch program when it reaches the one of the jump instructions. Likewise, a patch engine may be used to locate a specified patch program, load the specified patch program into the RAM and execute the specified patch program when the processor reaches the one of the jump instructions.








 
 
  Recently Added Patents
Channel estimating method and device
Compression molding method and reinforced thermoplastic parts molded thereby
Mixture, especially spinning solution
Analysis, secure access to, and transmission of array images
Techniques to manage communications resources for a multimedia conference event
Method and device for managing a turning setpoint applied to at least one turning actuator for the rear wheels of an automobile
Motor assembly
  Randomly Featured Patents
Anionic stabilized enzyme based clean-in-place system
Linear amplifier circuit
Dual type free-wheel/drive-on vehicle lift
Selective emissive cooking stove
Photothermographic material comprising at least one dye absorbing electromagnetic radiation in the wavelength range 700 to 1100NM
Lamp shade
Brake assembly for vehicles
Merchandise display device
Serial ATA (SATA) power optimization through automatic deeper power state transition
Method for rapidly dechucking a semiconductor wafer from an electrostatic chuck utilizing a hysteretic discharge cycle