Image Number 5 for United States Patent #6005429.
An apparatus for and method of reducing electromagnetic interference of an integrated circuit by providing multiple choking levels are disclosed. A choking circuit includes a choking level select signal generator, a pulse choking circuit connected to the choking level select signal generator, and a modulation control circuit connected to the pulse choking circuit. The choking level is increased when modules of the integrated circuit are less active, which reduces electromagnetic interference. The choking level is decreased when modules of the integrated circuit are more active, which maintains the voltage supplied to the power bus above a desired level.