Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Power-ground plane for a C4 flip-chip substrate










Image Number 2 for United States Patent #5886406.

A package for an integrated circuit that contains a plurality of small circular dielectric spaces which separate vias from a conductive plane of the package. The package has a first internal conductive plane, a second internal conductive plane and a plurality of bond pads located on a top surface of a substrate. The substrate has a plurality of vias that extend through the first conductive plane to couple the second conductive plane to the bond pads. The package has a plurality of concentric dielectric clearance spaces that separate the vias from the first conductive plane. The small concentric spaces optimize the area of the conductive plane to minimize the resistance and maximize the capacitance of the package.








 
 
  Recently Added Patents
Multiplexing channels by a medium access controller
Luggage
Systems and methods for tracking mobile terrestrial terminals for satellite communications
Non-intrusive processor tracing
Implementing state-of-the-art gate transistor, sidewall profile/angle control by tuning gate etch process recipe parameters
Machine tool with an electrical generator for passive power generation
Generating a network map
  Randomly Featured Patents
System and method for automated testing of writing skill
Light transmission load control system
Catalyst and process for oxidatively dehydrogenating a lower-alkyl-substituted ethylbenzene
Ultra-low particle semiconductor method
Ermophilane sesquiterpenoids as HIV intergrase inhibitors
Periodic pyramid: chemistry puzzle and teaching device
Fault isolation for communication networks for isolating the source of faults comprising attacks, failures, and other network propagating errors
Golf club head
Configurable calculating unit
Yarn winding apparatus and method