Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Power-ground plane for a C4 flip-chip substrate










Image Number 2 for United States Patent #5886406.

A package for an integrated circuit that contains a plurality of small circular dielectric spaces which separate vias from a conductive plane of the package. The package has a first internal conductive plane, a second internal conductive plane and a plurality of bond pads located on a top surface of a substrate. The substrate has a plurality of vias that extend through the first conductive plane to couple the second conductive plane to the bond pads. The package has a plurality of concentric dielectric clearance spaces that separate the vias from the first conductive plane. The small concentric spaces optimize the area of the conductive plane to minimize the resistance and maximize the capacitance of the package.








 
 
  Recently Added Patents
Method for isomerisation of hop alpha-acids using heterogeneous alkaline earth metal based catalysts
Feature management of a communication device
Preparation of isomerically pure substituted cyclohexanols
TRPM8 antagonists and their use in treatments
Intrinsic absorber layer for photovoltaic cells
Semiconductor memory apparatus
Image reading apparatus
  Randomly Featured Patents
Hybrid passive/automated flow proportional fluid sampler
Silicone adhesive compositions with improved quick stick
Electrical receptacle
Data processing system with bus access retraction
Memory circuit with improved word line noise preventing circuits
Measurement of magnetic fields using a string fixed at both ends
Gentiana plant named `Marsha`
FM demodulator
Wellbore treatment kits for forming a polymeric precipitate to reduce the loss of fluid to a subterranean formation
Diels-alder reaction of aldehydes with simple dienes