Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Semiconductor memory device and a reading method thereof










Image Number 2 for United States Patent #5883851.

In a semiconductor memory device, there is provided a column detecting circuit for generating a detection signal DETIO when respective voltage levels on a pair of I/O lines IO and IOB are developed into predetermined voltage levels which can be sensed as a valid data by external circuitry. Thereafter, a block selecting circuit and a sensing control signal generating circuit are respectively disabled by the detection signals DETIO and DETIOB causing a bit line precharge operation to be performed during a reading operation Thus, the sensing consumed by sense amplifiers during the reading operation period is reduced. In addition, since the bit line precharge operation is performed during the reading operation period, the bit line precharge time is reduced.








 
 
  Recently Added Patents
Business flow processing method and apparatus
Optical modulation element
Adsorptive molded parts and the use thereof
Gate timing for short servo wedge in disk memory systems
Method of monitoring and configuring
Method for remotely measuring fluctuations in the optical index of refraction of a medium
Wild card auto completion
  Randomly Featured Patents
Multi-directional optical element and an optical system utilizing the multi-directional optical element
Rain sensor with sigma-delta modulation and/or footprinting comparison(s)
Integration of static and dynamic data for database entities and the unified presentation thereof
Method of developing an anticlastic concentrator
Write compensation method and magnetic disk apparatus adapted for high-density recording
Thermodynamic process for a practical approach to the Carnot cycle
Safety electrical receptacle
Uplink/downlink synchronizing apparatus of mobile communication terminal
Ground supported fishing pole support
MicroRNA1 therapies