Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Microcomputer










Image Number 14 for United States Patent #5867726.

A built-in memory is divided into the following two types: first memories 5 and 7 and second memories 4 and 6, and made accessible in parallel by third buses XAB and XDB and second buses YAB and YDB respectively. Thereby, a CPU core 2 can simultaneously transfer two data values from the built-in memory to a DSP engine 3. Moreover, the third buses XAB and XDB and the second buses YAB and YDB are also separate from first buses IAB and IDB to be externally interfaced and the CPU core 2 can access an external memory in parallel with the access to the second memories 4 and 6 and the first memories 5 and 7.








 
 
  Recently Added Patents
Positive active material and positive electrode for rechargeable lithium battery and rechargeable lithium battery including the positive electrode
Disulfide-linked polyethyleneglycol/peptide conjugates for the transfection of nucleic acids
Apparatus for certificate-based cookie security
Rotary electric machine
Packaged semiconductor chips
Maize hybrid X18C111
Semiconductor device having a liquid cooling module
  Randomly Featured Patents
Providing a digital image and disposition of a good damaged during transit
Drink pouring dispenser
Food-slicing machine and method
Viscoelastic fluid for use in surgery and other therapies and method of using same
Image sensing apparatus and control method thereof
Engine generator sets and methods of assembling same
Frequency band filter
Blowing apparatus in a paper machine or the like
Multi-user MIMO transmissions in wireless communication systems
Network printing system for programming a print job by selecting a job ticket identifier associated with remotely stored predefined document processing control instructions