Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
High-performance fault tolerant computer system with clock length synchronization of loosely coupled processors










Image Number 10 for United States Patent #5845060.

A fault-tolerant computer system employing multiple CPUs executing the same instruction stream under independent clock cycle timing. The CPUs deterministically execute the instructions internally until input or output operations require access to memory or devices which are not synchronous with the local CPU clock. The CPUs are forced to take the same number of CPU clock cycles to complete the I/O operations. When the I/O operation is complete the internal processing of the instruction stream continues in a manner which is clock aligned in each of the multiple CPUs but which may be separate in real time due to oscillator drift. Accumulated drift is periodically removed by a timed interrupt which forces resynchronization of the CPUs in real time.








 
 
  Recently Added Patents
Systems and methods for adaptive blind mode equalization
Method of creating exercise routes for a user and related personal navigation device
Generating package profiles in software package repositories using selective subsets of packages
Multi display device and method of controlling the same
Scale information for drawing annotations
Image processing apparatus and image processing method
Commissioning incoming packet switched connections
  Randomly Featured Patents
Whistle with finger grip
Bottom entry positive acting ball valve
Cooling system having plural cooling stages in which refrigerate-filled chamber type refrigerators are used
Air purity monitoring system
Tool storage box
Method for processing locating pulses supplied by a gamma camera and a gamma camera utilizing this method
Apparatus and method for increasing definition of digital television
Wheel spin control apparatus for use in an automobile
Semiconductor device and method of designing the semiconductor device
Video encoding method and apparatus and video decoding method and apparatus using residual resizing