Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Semiconductor device and testing apparatus thereof










Image Number 19 for United States Patent #5828258.

A tester is connected to a signal output terminal provided in a DRAM chip, and a frequency of a clock signal output from an internal timer is monitored. The frequency of the clock signal is varied by changing the combination of 3 bit signals, so as to obtain signals by which the frequency closest to the set value is obtained. A fuse in the internal timer is disconnected to set the frequency of the clock signal so as to obtain the same state as in the case where that signal is applied.








 
 
  Recently Added Patents
Multi display device and method of controlling the same
Stroboscopic image modulation to reduce the visual blur of an object being viewed by an observer experiencing vibration
Systems and methods for automated institutional processing of payments
Far field telemetry operations between an external device and an implantable medical device during recharge of the implantable medical device via a proximity coupling
Plastic floor-wall transition methods, materials, and apparatus
Methods and apparatus for performing multiple photoresist layer development and etching processes
Method and system for the assignment of security group information using a proxy
  Randomly Featured Patents
Wiper having tilting multi-blade
Four element array of cassegrain reflect or antennas
Methods of making olive juice extracts containing reduced solids
Apparatus for coating elongated objects of small diameter
Preloading for lockbolt installation
Isotonic cervical exercise device
Height control system for a cotton harvester
Compositions of n-[2,4-bis(1,1-dimethylethyl)-5-hydroxyphenyl]-1,4-dihydro-4-oxoquinoline- -3-carboxamide
Method and device for cleaning a gaseous fluid using a conductive grid between charging head and filter
Microprocessor system and method for instruction-initiated recording and execution of instruction sequences in a dynamically decoupleable extended instruction pipeline