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Time-division data multiplexer with feedback for clock cross-over adjustment










Image Number 4 for United States Patent #5805089.

A time-division data multiplexer has feedback for adjusting the select clock cross-over voltage. The multiplexer includes a multi-phase clock generator having a plurality of select clock outputs with different phases, a plurality of parallel data inputs and first and second serial data outputs. A first set of gating transistors is coupled between the first data output and a common node. Each transistor in the first set is gated by a corresponding data input and at least one corresponding select clock output. A second set of gating transistors is coupled between the second data output and the common node. Each transistor in the second set is gated by a corresponding data input and at least one corresponding select clock output. A first current source is coupled to the common node. An amplifier has a first input which is coupled to the common node, a second input which is coupled to a reference voltage generator and a cross-over control output which is coupled to the plurality of select clock outputs for adjusting the cross-over voltage of the select clock outputs in response to a comparison of the voltages on the first and second amplifier inputs. A loop filter is coupled to the cross-over control output.








 
 
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