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Semiconductor integrated circuit using standardized analog cells

Image Number 7 for United States Patent #5801407.

An analog-circuit block, which is fabricated on a chip of a semiconductor integrated circuit, is configured by a plurality of analog cells each having a desired function such as the function of an operational amplifier. The analog cells are standardized with respect to the height thereof. Two power-source wires are provided respectively in an upper-end section and a lower-end section of the analog-circuit block, so that they are commonly used by the analog cells. In the analog cell, input/output wires are placed in a direction perpendicular to the power-source wires. For example, two input wires are provided to input signals for two inputs of an operational amplifier while one output wire is provided to provide an output signal, wherein one of the two input wires is partially connected to the output wire. Further, it is possible to provide a dummy wire which is placed in parallel with the output wire, wherein a midpoint of the output wire is connected to a midpoint of the dummy wire. Because of the provision of the dummy wire, it is possible to suppress interference between circuits. Moreover, the analog cell is surrounded by a guard-ring diffusion layer; and there are provided guard-ring wires to contact with the guard-ring diffusion layer, so that propagation of noise is avoided.

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