Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Method and apparatus for biasing cache LRU for prefetched instructions/data based upon evaluation of speculative conditions










Image Number 10 for United States Patent #5774685.

The computer processing unit of the present invention includes a new prefetch instruction, referred to as an STOUCH instruction, which provides the capability to encode compile-time speculations associated with the conditional branches between the time the prefetch request is initiated and the time the prefetched data is actually needed. As a result of this explicit communication of compile-time speculations to the run-time hardware, prefetched lines based on invalid speculations can be discarded earlier, whereas, prefetched lines based on valid speculations can be retained longer in the cache, leading to better cache performance.








 
 
  Recently Added Patents
Media processing method and device
Grid computing accounting and statistics management system
Co-map communication operator
Paging of a user equipment (UE) within a wireless communications system
Post-processing device and image forming system
Varying latency timers in a wireless communication system
Manufacturing process for cellular screening substratum, resultant substratum, and method and apparatus for screening
  Randomly Featured Patents
Semiconductor device
Dual side cleaning and traversing screen filtration system
Faucet
System for calibration of dual polarization radar with built-in test couplers
Crust remover
Diaphragm pump actuated liquid dispensing apparatus having dome shaped deformable membrane
Aqueous solvent dispersible linear polyurethane resins
Flow tube exercising tool
Electropneumatic pilot adapter
Non-tracking solar energy collector system