Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Method and apparatus for biasing cache LRU for prefetched instructions/data based upon evaluation of speculative conditions










Image Number 10 for United States Patent #5774685.

The computer processing unit of the present invention includes a new prefetch instruction, referred to as an STOUCH instruction, which provides the capability to encode compile-time speculations associated with the conditional branches between the time the prefetch request is initiated and the time the prefetched data is actually needed. As a result of this explicit communication of compile-time speculations to the run-time hardware, prefetched lines based on invalid speculations can be discarded earlier, whereas, prefetched lines based on valid speculations can be retained longer in the cache, leading to better cache performance.








 
 
  Recently Added Patents
Fibrous laminate interface for security coatings
Process for preparing higher hydridosilanes
Phase lock loop with injection pulse control
Managing and collaborating with digital content
Techniques for image segment accumulation in document rendering
Proximity sensor arrangement in a mobile device
Query processing with specialized query operators
  Randomly Featured Patents
Image-forming method employing light-sensitive material and image-receiving material
Double Impatiens plant named `Boddblbrp`
Toy vehicle
Programmable microprocessor
Exercise device
Elevated palmitic acid production in soybeans
Method and apparatus for driving and piecing-up open-end spinning units
Object oriented storage pool apparatus and method
Electronic door locking system for an automotive vehicle
Interactive computer vision system