Resources Contact Us Home
Method and apparatus for biasing cache LRU for prefetched instructions/data based upon evaluation of speculative conditions

Image Number 10 for United States Patent #5774685.

The computer processing unit of the present invention includes a new prefetch instruction, referred to as an STOUCH instruction, which provides the capability to encode compile-time speculations associated with the conditional branches between the time the prefetch request is initiated and the time the prefetched data is actually needed. As a result of this explicit communication of compile-time speculations to the run-time hardware, prefetched lines based on invalid speculations can be discarded earlier, whereas, prefetched lines based on valid speculations can be retained longer in the cache, leading to better cache performance.

  Recently Added Patents
Systems, methods, and computer readable media for providing information related to virtual environments to wireless devices
Image forming apparatus and method
Method and apparatus for executing load distributed printing
Method and computer system for automatic vectorization of a vessel tree
Patterned MR device with controlled shape anisotropy
Simultaneous enhancement of transmission loss and absorption coefficient using activated cavities
Floor relief for dot improvement
  Randomly Featured Patents
Folding presser assembly
Optical component with plural orientation layers on the same substrate wherein the surfaces of the orientation layers have different patterns and direction
Method for manufacturing liquid flow passage unit, liquid flow passage unit, liquid ejecting head unit, and liquid ejecting apparatus
Step-on wastebasket
Method for secure transactions utilizing physically separated computers
Methods for prevention and treatment of attention deficit disorder
Tremolo device for stringed instruments
Unitarily-tuned transponder/shield assembly
Reception apparatus using spread spectrum communication scheme
Machine tool positioning arrangement