Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Method and apparatus for biasing cache LRU for prefetched instructions/data based upon evaluation of speculative conditions










Image Number 10 for United States Patent #5774685.

The computer processing unit of the present invention includes a new prefetch instruction, referred to as an STOUCH instruction, which provides the capability to encode compile-time speculations associated with the conditional branches between the time the prefetch request is initiated and the time the prefetched data is actually needed. As a result of this explicit communication of compile-time speculations to the run-time hardware, prefetched lines based on invalid speculations can be discarded earlier, whereas, prefetched lines based on valid speculations can be retained longer in the cache, leading to better cache performance.








 
 
  Recently Added Patents
LED drive circuit
Display screen with graphical user interface
System and method for distributing emergency data messages to public safety answering points in a balanced manner
Electric vehicle supply equipment having a socket and a method of charging an electric vehicle
Washing-up bowl
Valved, microwell cell-culture device and method
Charging current control method and charging system
  Randomly Featured Patents
Azetidine derivatives
Frictional clutch assembly
Method and system for filtering multicast packets in a peripheral component environment
Extruded material of a free-cutting aluminum alloy excellent in embrittlement resistance at a high temperature
Method of encoding data for transmission
Soybean cultivar 14333215
Vehicle seat with integral child seat
Distortion-free amplifiers
Overclocking control device and overclocking control method
Multi-lumen core deflecting endoscope