Resources Contact Us Home
Method and apparatus for biasing cache LRU for prefetched instructions/data based upon evaluation of speculative conditions

Image Number 10 for United States Patent #5774685.

The computer processing unit of the present invention includes a new prefetch instruction, referred to as an STOUCH instruction, which provides the capability to encode compile-time speculations associated with the conditional branches between the time the prefetch request is initiated and the time the prefetched data is actually needed. As a result of this explicit communication of compile-time speculations to the run-time hardware, prefetched lines based on invalid speculations can be discarded earlier, whereas, prefetched lines based on valid speculations can be retained longer in the cache, leading to better cache performance.

  Recently Added Patents
Defected ground plane inductor
Question and answer system wherein experts are associated with models and have response rates that are associated with time intervals
Method for producing (meth)acrylic anhydride, method for storing (meth)acrylic anhydride, and method for producing (meth)acrylate
Laser protection polymeric materials
Multichannel device utilizing a centralized out-of-band authentication system (COBAS)
Mounting structure, electro-optical apparatus, and touch panel
Assigning runtime artifacts to software components
  Randomly Featured Patents
Herbicidal sulfonamides
EAS tag using tape with conductive element
Lie detector system using reaction time
Jelly-roll type electrode assembly and secondary battery including the same
Capped spray bottle
Refrigerator shelf
Device for the withdrawal of needles
Multi-stage ejector pump
Screening assays for agonists or antagonists or receptor activator of NF-.kappa.B