Resources Contact Us Home
Floating gate type non-volatile semiconductor memory device

Image Number 5 for United States Patent #5751036.

A tunnel region is surrounded by an impurity diffusion layer and a drain diffusion layer, and a coupling portion coupling one and the other end portions of a floating gate to each other is arranged on only an isolation region. With this arrangement, even if a parasitic inversion layer is formed below the other end portion upon extraction of electrons, the parasitic inversion layer does not contact a semiconductor substrate, resulting in a small substrate current. Therefore, a high-voltage, large-current external power supply need not be prepared in addition to a normal voltage power supply.

  Recently Added Patents
Coated article and method for making the same
Integrated circuit packaging system with heat slug and method of manufacture thereof
Image processing apparatus, method, and storage medium for performing soft proof processing
Rewriting branch instructions using branch stubs
System and method of creating and providing SMS http tagging
Asymmetric switching rectifier
  Randomly Featured Patents
Optical scanning device and image forming apparatus using the same
Fluid joint
Radiation detector and method of manufacturing the same
Production control system for controlling producing points
Method and system for reliability analysis of disk drive failures
Apparatus for high performance multiplication
System and method for in-context, topic-oriented instant messaging
Image recording method and image recording apparatus
Method and apparatus for accelerating plant germination and growth
Bonding thermoplastic resins