Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Address multiplex semiconductor memory device for enabling testing of the entire circuit or for only partial components thereof










Image Number 4 for United States Patent #5726994.

A memory array is logically and/or physically divided into a plurality of blocks to allow test by individual blocks. When a plurality of column address strobe signals are provided and memory accessing is made by a plurality of bits to the memory array corresponding to the column address strobe signal, tests are independently conducted for each memory array by using the column address strobe signal.








 
 
  Recently Added Patents
Powder for layerwise manufacturing of objects
Method of measuring specific absorption rate of electromagnetic waves
Selecting from a plural of energy saving modes
Display screen with graphical user interface
Data transfer device and data transfer method
Transfer formulas
Calibration device and related method for phase difference between data and clock
  Randomly Featured Patents
Method for regulating the flow of animals through a slaughtering facility
Completely isolated synchronous boost DC-to-DC switching regulator
Cassette adaptor for 8-track cartridge tape player
Cathode potential controller, self light emission display device, electronic apparatus, and cathode potential controlling method
Fireplace grate
Lubricating device
Safety needle
Rotation angle sensor or length sensor
Method of determining parameter from sparse measurement data
Resistive exercise pants and hand stirrups