Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Address multiplex semiconductor memory device for enabling testing of the entire circuit or for only partial components thereof










Image Number 4 for United States Patent #5726994.

A memory array is logically and/or physically divided into a plurality of blocks to allow test by individual blocks. When a plurality of column address strobe signals are provided and memory accessing is made by a plurality of bits to the memory array corresponding to the column address strobe signal, tests are independently conducted for each memory array by using the column address strobe signal.








 
 
  Recently Added Patents
Digital display
Organizer
Method and apparatus for connecting to external device
Methods and systems for improved engine speed control during engine starting
Transcription factor
Powerline communication device with load characterization functionality
Switching device and electronic apparatus using the same
  Randomly Featured Patents
Method and apparatus for breaking, separating, and inspecting eggs
Rotary electric apparatus with high cooling performance
Photo-ionization detector for detecting volatile organic gases
Polyester polyols and their use as a binder component in two-component polyurethane coating compositions
Photoimaging method and apparatus
Distributed arbitration with programmable priorities
One-piece core plug
Method to produce hot-worked gamma titanium aluminide articles
Electronic process controller having password override
Powershift reversing gearbox