Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Address multiplex semiconductor memory device for enabling testing of the entire circuit or for only partial components thereof










Image Number 10 for United States Patent #5726994.

A memory array is logically and/or physically divided into a plurality of blocks to allow test by individual blocks. When a plurality of column address strobe signals are provided and memory accessing is made by a plurality of bits to the memory array corresponding to the column address strobe signal, tests are independently conducted for each memory array by using the column address strobe signal.








 
 
  Recently Added Patents
5-phenyl-pentanoic acid derivatives as matrix metalloproteinase inhibitors for the treatment of asthma and other diseases
Simulating non power of two texture behavior
Error protection for pipeline resources
Systems and methods for printing images outside a normal color gamut in image forming devices
Water bottle warning triangle
Method for preparing an organic film at the surface of solid support under non-electrochemical conditions, solid support thus obtained and preparation kit
Apparatus and method to reduce noise in magnetic resonance imaging systems
  Randomly Featured Patents
Earring and brooch organizer
Method of and apparatus for processing heavy hydrocarbons
Thin film or solder ball including a metal and an oxide, nitride, or carbide precipitate of an expandable or contractible element
Gas generation apparatus
Simplified variable geometry turbocharger with sliding gate and multiple volutes
Echo canceller and method of controlling the same
Charging device
Crosslinkable polyamideimide oligomers and a method of preparation
Apparatus for calibrating surface temperature measuring devices
Dispersion and slope compensating optical fiber and transmission link including same