Resources Contact Us Home
Address multiplex semiconductor memory device for enabling testing of the entire circuit or for only partial components thereof

Image Number 10 for United States Patent #5726994.

A memory array is logically and/or physically divided into a plurality of blocks to allow test by individual blocks. When a plurality of column address strobe signals are provided and memory accessing is made by a plurality of bits to the memory array corresponding to the column address strobe signal, tests are independently conducted for each memory array by using the column address strobe signal.

  Recently Added Patents
Mobile phone
Capacitive microphone with integrated cavity
System, method, and apparatus for settlement for participation in an electric power grid
Method for simultaneous transmitter operation
Zoom lens, imaging device and information device
Miniature communications gateway for head mounted display
  Randomly Featured Patents
Back-light apparatus for liquid crystal display device
Computerized, multimedia, network, real time, interactive marketing and transactional system
Image pre-processor for character recognition system
Navigation apparatus and position detection method
Modular plastics extrusion die
Method for cutting metal bodies in the mouth
Organic EL device and method for manufacturing same
Method for making an electric motor stator
Telemedicine system using voice video and data encapsulation and de-encapsulation for communicating medical information between central monitoring stations and remote patient monitoring statio
Minority carrier isolation barriers for semiconductor devices