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Method of measuring delay time in semiconductor device










Image Number 2 for United States Patent #5675265.

A method of measuring a delay time in a semiconductor device which has a particular circuit subject to delay time measurement, a test circuit coupled to an input terminal of the particular circuit for bypassing the particular circuit, and a selector for selectively outputting either an output signal from the particular circuit or an output signal from the test circuit. The method includes the steps of: coupling an input signal generator to the common input terminal and applying a test signal to both the particular circuit and the test circuit, coupling an output signal determination circuit to an output terminal of the selector, detecting a signal on the output terminal of the selector, measuring the respective delay times occurring when the test signal passes through the particular circuit and through the test circuit by the input signal generator and the output signal determination circuit by switching the selector, and obtaining a delay time in the particular circuit by subtracting one of the delay times from the other. The delay time only in the particular circuit can be accurately measured without being influenced by a delay time occurring in the measurement equipment.








 
 
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