Resources Contact Us Home
Semiconductor memory device with reduced consumption power for bit line precharge

Image Number 8 for United States Patent #5600601.

A semiconductor memory device is disclosed for use in writing and reading data. The memory device is provided with a memory cell array including a plurality of word lines, a plurality of bit lines, and a plurality of memory cells connected to each of the word lines and bit lines, respectively. The memory device is provided with a precharger which precharges to set the potential of each bit line to a given level before the data on the memory cells can be read out onto the bit lines. The memory device is responsive to an address signal, and a controller for controlling the precharger. The controller activates the precharger so that all the bit lines are precharged when a previously selected word line changes following the change of the address signal.

  Recently Added Patents
Triple-trim reference voltage generator
Synchronization of web applications and media
Method of sending CTI messages in a communication system
Reliable and accurate usage detection of a software application
System, method and computer program product for sharing a single instance of a database stored using a tenant of a multi-tenant on-demand database system
Optoelectronic component and method for producing an optoelectronic component
  Randomly Featured Patents
"Warning Bump" traffic safety device
Resin-coated metallic pigment comprising a surface modifier at a surface portion, water-based paint containing the same, and method of manufacturing resin-coated metallic pigment
Multiple purpose compound action snips
Disk device and slider
High chair tray adapted to receive receptacles
Brake control system
Low slag iron making process with injecting coolant
Method and system of purposeful movement to a steady beat
Point-to-multipoint high definition multimedia transmitter and receiver
Clothing fuzz remover