Resources Contact Us Home
Semiconductor memory device with reduced consumption power for bit line precharge

Image Number 8 for United States Patent #5600601.

A semiconductor memory device is disclosed for use in writing and reading data. The memory device is provided with a memory cell array including a plurality of word lines, a plurality of bit lines, and a plurality of memory cells connected to each of the word lines and bit lines, respectively. The memory device is provided with a precharger which precharges to set the potential of each bit line to a given level before the data on the memory cells can be read out onto the bit lines. The memory device is responsive to an address signal, and a controller for controlling the precharger. The controller activates the precharger so that all the bit lines are precharged when a previously selected word line changes following the change of the address signal.

  Recently Added Patents
Front portion of a vehicle, toy, and/or replicas thereof
Signal processing and tiered signal encoding
Capacity and coverage self-optimization method and device in a mobile network
Remote ignition system for a vehicle and method for securing a remote ignition function
Accelerator for a read-channel design and simulation tool
Adding co-users to user definable co-user lists
Method and system for controlled media sharing in a network
  Randomly Featured Patents
CMOS image sensor and method for manufacturing the same
Modular shopping cart cushion for infants and small children
Preparation of substituted 3-aryl-5-haloalkyl-pyrazoles having herbicidal activity
Waterproof head assembly for a flashlight
Foot pedal arrangement for electronic throttle control of truck engines
Device for measuring and recording spontaneous blood platelet aggregation in platelet-rich citrated plasma
Security and licensing with application aware storage
Independent link and bank selection
Coordinated data conversion systems and methods
Permanent magnet assembly