Resources Contact Us Home
Semiconductor memory device with reduced consumption power for bit line precharge

Image Number 8 for United States Patent #5600601.

A semiconductor memory device is disclosed for use in writing and reading data. The memory device is provided with a memory cell array including a plurality of word lines, a plurality of bit lines, and a plurality of memory cells connected to each of the word lines and bit lines, respectively. The memory device is provided with a precharger which precharges to set the potential of each bit line to a given level before the data on the memory cells can be read out onto the bit lines. The memory device is responsive to an address signal, and a controller for controlling the precharger. The controller activates the precharger so that all the bit lines are precharged when a previously selected word line changes following the change of the address signal.

  Recently Added Patents
High performance data transport system and method
Using sets of OTDR receive fibers with different lengths of marker events to verify optical fiber connectivity
Process and intermediates for preparing lapatinib
Vehicle, toy, and/or replicas thereof
Polarized film apparatus with bands of alternating orientation
Illumination unit for a direct-view display
Sharing networks determined by sharing of items between individuals
  Randomly Featured Patents
Videotape cue control and display apparatus
Multi-compartment beverage container
Epoxy group-containing silicone resin and compositions based thereon
Methods for producing agglomerates of metal powders and articles incorporating the agglomerates
Preparation of cross-linked modified organopolysiloxanes
Closure for hand filled bakery packages utilizing cohesive material
Thiopyruvic amide compounds
Compounds for treatment of cardiac arrhythmia synthesis, and methods of use
Track light fixture
Production of nickelized shaped articles