Resources Contact Us Home
Semiconductor memory device with reduced consumption power for bit line precharge

Image Number 4 for United States Patent #5600601.

A semiconductor memory device is disclosed for use in writing and reading data. The memory device is provided with a memory cell array including a plurality of word lines, a plurality of bit lines, and a plurality of memory cells connected to each of the word lines and bit lines, respectively. The memory device is provided with a precharger which precharges to set the potential of each bit line to a given level before the data on the memory cells can be read out onto the bit lines. The memory device is responsive to an address signal, and a controller for controlling the precharger. The controller activates the precharger so that all the bit lines are precharged when a previously selected word line changes following the change of the address signal.

  Recently Added Patents
Baseball themed hand clap maraca
Oxidative coupling of hydrocarbons as heat source
Garden tool handle
Methods of packaging imager devices and optics modules, and resulting assemblies
Display system with mounting assemblies and associated methods
Mobile device mode control based on dual mapping of availability (presence) information
Social network user data advertising
  Randomly Featured Patents
Solid-phase drying and solid-phase polymerization of polyamide
Method for instant preparation of a drug containing large unilamellar vesicles
Adapter with built-in shutter
Patterns of electrically conducting polymers and their application as electrodes or electrical contacts
Method of preparing alkalihalide free oligomeric, brominous xylylene bisphenol ethers
Single sided shuttle-type blow molding method
Reversible electrodeposition device with ionic liquid electrolyte
Process for fabricating OLED lighting panels
Trailer load shifting device
Swash-plate machine