Resources Contact Us Home
Semiconductor memory device with reduced consumption power for bit line precharge

Image Number 4 for United States Patent #5600601.

A semiconductor memory device is disclosed for use in writing and reading data. The memory device is provided with a memory cell array including a plurality of word lines, a plurality of bit lines, and a plurality of memory cells connected to each of the word lines and bit lines, respectively. The memory device is provided with a precharger which precharges to set the potential of each bit line to a given level before the data on the memory cells can be read out onto the bit lines. The memory device is responsive to an address signal, and a controller for controlling the precharger. The controller activates the precharger so that all the bit lines are precharged when a previously selected word line changes following the change of the address signal.

  Recently Added Patents
Personal warming apparatus
Out-of-order load/store queue structure
High damage threshold frequency conversion system
Providing a multi-tenant knowledge network
Storage system, control method therefor, and program
Resuming piecewise calibration of a real-time-clock unit after a measured offset that begins at the next calibration period
Systems and methods for automobile accident claims initiation
  Randomly Featured Patents
MOS P-N junction diode device and method for manufacturing the same
Apparatus for generating high pressure water in response to water weight changes caused by waves
Sheet material guidance system
Stepped tile floor for a solid fuel boiler
Semiconductor device
Multi-donor booster operation and system
Apparatus for monitoring an aircraft flap and application of a dynamometric rod
Manufacture of a semiconductor device
Lighting module for motor vehicle headlight
Image processing method