Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Reducing the natural current limit in a power MOS device by reducing the gate-source voltage










Image Number 3 for United States Patent #5541799.

In accordance with the present invention, an output current limit circuit for protecting a power MOS output device of an integrated circuit from an excessive drain current comprises a power MOS device 110, a means 30 to sense a predetermined trigger current, and a means 20 to reduce a gate-source voltage on MOS output device 110 to a predetermined approximately fixed value. A drain current I.sub.D flows through power MOS device 110 from output terminal 102 in response to the gate-source voltage. A short circuit condition may allow an excessive amount of drain current I.sub.D to flow through output terminal 102. The gate-source voltage is reduced in response to sensing the trigger current. Reducing the gate-source voltage raises a drain-source resistance of MOS device 110 and reduces drain current I.sub.D so that MOS device 110 is not damaged by the short circuit condition.








 
 
  Recently Added Patents
Sending notification of event
Controller for internal combustion engine
Modular connector for touch sensitive device
Projector
LED-array package
Active element machine computation
Systems and methods for detailed error reporting in data storage systems
  Randomly Featured Patents
Bracelet
Health monitor
Welding torch maintenance center
Die changeover apparatus for box blank cutting machine
1-aryloxy-2,3,4,5-tetrahydro-3-benzazepines
Handlebar adapter for mounting a bicycle display
Method of and apparatus for manufacturing biaxially oriented film
Vehicle wheel front face segment
3-Substituted-4-hydroxyphenyl-2-piperidylcarbinols as .beta.-adrenergic stimulants
Protective resilient enclosure for wires, cables and other elongate articles