Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Method of, and apparatus for manufacturing a gear with a central through hole










Image Number 5 for United States Patent #5516376.

A hardened surface layer is formed in the region of inner and outer surfaces of a hollow material having a central through hole, then the hollow material is hot-forged into a hollow gear-like forged body by a forging die having a first die element with a piercing punch entering into the central through hole of the hollow material from one side thereof and having a second die element with a piercing punch entering into the central through hole of the hollow material from another side thereof. The forging die forms teeth of the gear on the outer side of the hollow material while producing an annular flash in the central through hole of the hollow material between the piercing punches. A distance between the piercing punches in a closed condition of the forging die defines a thickness of the annular flash which is 0.3 mm or more and no greater than 1.3 times (130%) of a depth of the hardened surface layer. After that, the annular flash is removed from the forged body, and thermal refining is implemented to the forged body by quenching and tempering.








 
 
  Recently Added Patents
Method of manufacturing crystalline silicon solar cells with improved surface passivation
Cancer vaccines containing epitopes of oncofetal antigen
Battery power management system and method
Systems and/or methods for determining item serial number structure and intelligence
Dynamic learning method and adaptive normal behavior profile (NBP) architecture for providing fast protection of enterprise applications
Soybean cultivar CL0911610
Program recording medium, image processing apparatus, imaging apparatus, and image processing method
  Randomly Featured Patents
Controllable drive for a movable releaser of a motor vehicle friction clutch
Full color display including LEDs with rare earth active areas and different radiative transistions
Method for polishing a semiconductor wafer
Restraining device for spinal taps
Multiple channel waveform generator with dynamic delay through symbol superresolution
ADC background calibration timing
AC power line network simulator
Combined night/day viewing apparatus
Image forming apparatus having detection means for detecting density of developer
System and method for creating a restartable non-native language routine execution environment