Resources Contact Us Home
Semiconductor memory device having an SRAM as a cache memory integrated on the same chip and operating method thereof

Image Number 7 for United States Patent #5509132.

A cache DRAM (100) includes a DRAM memory array (11) accessed by a row address signal and a column address signal, an SRAM memory array (21) accessed by the column address signal, and an ECC circuit (30). The DRAM memory array (11) is divided into a plurality of blocks (B1 to B64), each including a plurality of columns. The SRAM memory array (21) includes 4 ways (W1 to W4). In determining a cache hit/cache miss, a column address signal is inputted. Consequently, the SRAM memory array (21) is accessed and data are read from each of the ways. When a cache hit occurs, one way is selected in response to an externally applied way address signal, and data from that way are outputted. When a cache miss occurs, the column address signal is latched and the row address signal is applied. The DRAM array (11) is accessed in accordance with the row address signal and the latched column address signal.

  Recently Added Patents
Analysis of methylation using nucleic acid arrays
Chip on chip semiconductor device including an underfill layer having a resin containing an amine-based curing agent
Signal processing apparatus and methods
Power converter with a variable reference voltage and inrush current limiting
Highly specialized application protocol for email and SMS and message notification handling and display
Data transfer device and data transfer method
Methods and systems for providing a business repository
  Randomly Featured Patents
Process for removing impurities from polymers
Transport vehicle for a rotor blade of a wind-energy turbine
Band saw machine
Apparatus for the replaceable mounting of a winding drum for web-like material
Massage implement
Memory system
Diffusionless conductor/oxide semiconductor field effect transistor and methods for making and using the same
TOF range finding with background radiation suppression
Belt pad
Bridge with lingual bolt locking attachment