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Output enable structure and method for a programmable logic device

Image Number 18 for United States Patent #5506517.

An output enable structure and a method for providing output capability to an input/output cell of a programmable logic device are shown. In one embodiment, one of two global output enable signals, a test output enable signal, and two product term output enable signals is selected for controlling an output buffer of an I/O cell. Additional pin-out flexibility is provided by routing the input signal received at an I/O pin to neighboring I/O cells.

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