Resources Contact Us Home
Data processor and read control circuit, write control circuit therefor

Image Number 13 for United States Patent #5499380.

A shift circuit 213 used in arithmetic operations is provided with the shift width generating circuit 217 which generates a shift width data from lower bits of an access address and an access size, and a circuit is provided to generated data comprising the first select output circuit 214, the third select output circuit 216 and the like which generate a data by merging byte by byte selected from either an output of the shift circuit 213 or a value of a register of a register file 210 according to the combination of the lower bits of the access address and the access size. It is possible to align the data in the shift circuit 213 which is provided for the purpose of arithmetic operations, and exclusive alignment circuit is made unnecessary thereby enabling it to reduce the amount of hardware.

  Recently Added Patents
DMAPN having a low DGN content and a process for preparing DMAPA having a low DGN content
Bullet lens design for the dasal seeker
System and method for providing security in browser-based access to smart cards
Social network user data advertising
Method and computed tomography device and data storage medium for performing a dynamic CT examination on a patient
Method and apparatus for policy-based network access control with arbitrary network access control frameworks
Systems and methods for DC-to-DC converter control
  Randomly Featured Patents
Camera frame assembly having actuable battery contact
Method for setting the threshold voltage of a power mosfet
Cake pan
Enzyme with endoglucanase activity
Solid state camera device having free carrier absorption
Backlight assembly and liquid crystal display apparatus having the same
Method and apparatus for data analysis
Method of using MPEG-7 standard in object segmentation
Catheter introducer with thin walled sheath
Safety guard for food slicer