Resources Contact Us Home
Data processor and read control circuit, write control circuit therefor

Image Number 13 for United States Patent #5499380.

A shift circuit 213 used in arithmetic operations is provided with the shift width generating circuit 217 which generates a shift width data from lower bits of an access address and an access size, and a circuit is provided to generated data comprising the first select output circuit 214, the third select output circuit 216 and the like which generate a data by merging byte by byte selected from either an output of the shift circuit 213 or a value of a register of a register file 210 according to the combination of the lower bits of the access address and the access size. It is possible to align the data in the shift circuit 213 which is provided for the purpose of arithmetic operations, and exclusive alignment circuit is made unnecessary thereby enabling it to reduce the amount of hardware.

  Recently Added Patents
Magnetic memory element, driving method for same, and nonvolatile storage device
Leg stretching device
Headset systems and methods
Selective facsimile denial
Integrated transmit/receive switch
System and method for controlling a wireless device
Managing distributed applications using structural diagrams
  Randomly Featured Patents
Treatment of gas separation membranes with inert solvent
Electrocardiograpic patient lead cable apparatus
Shock resistant lens device with zoom and macrofocusing controls
Clamping collar
Microbiologically produced D-2-hydroxy-4-methylpentanoic acid dehydrogenase, process for its production and its use
Apparatus for producing coils from films of insulating material, conductively coated under vacuum
Process for preparing 3,5-difluoroaniline
Adjustable grade stick and method of using same
Process for purifying L-ascorbic acid 2-phosphate
Cyclic acetal compound, polymer, resist composition and patterning process